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October 22-23, 2024
Santa Clara, CA
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Wednesday, October 23
 

1:55pm PDT

Understanding the Unformated Trace & Diagnostic Data Packet Encapsulation for RISC-V Specification - Iain Robertson, Siemens EDA
Wednesday October 23, 2024 1:55pm - 2:13pm PDT
The Unformatted Trace and Diagnostic Data Packet Encapsulation for RISC-V specification was recently ratified. The standard was developed in response to a need for a standard encapsulation format for Efficient Trace for RISC-V (E-Trace) packets, that would support a variety of widely used transport protocols. However, the resulting standard is broader than this, and is suitable for encapsulating any kind of unformatted diagnostic data.

This presentation explores the properties and benefits of this standard and shows how it can be applied to E-Trace (as well as other types of diagnostic data such as bus utilization metrics, bus or logic analyzer trace and code profiling instrumentation) for transport via AMBA ATB or the Siemens Messaging Infrastructure.
Speakers
avatar for Iain Robertson

Iain Robertson

Senior Director, Hardware Engineering, Siemens EDA
Iain Robertson is Senior Hardware Engineering Director for Tessent Embedded Analytics, a productline within Siemens EDA. Iain has more than 35 years’ experience in silicon design, architecture andengineering team leadership. An expert in monitoring, analytics, processor trace and... Read More →
Wednesday October 23, 2024 1:55pm - 2:13pm PDT
Theater (Level 2)
  Security

2:55pm PDT

Simultaneous Multithreading with RISC-V Enables Higher Throughput Efficiency in Data-Centric Applications in Automotive - Vasanth Waran, MIPS
Wednesday October 23, 2024 2:55pm - 3:13pm PDT
This session covers how simultaneous multithreading (SMT) with RISC-V Hardware threads (harts) increases the throughput efficiency of a processing subsystem for automotive applications.
Speakers
avatar for Vasanth Waran

Vasanth Waran

Head of Automotive Business Unit, MIPS
Vasanth Waran heads the Automotive Business unit at MIPS. He has 22 years of experience in the Semiconductor industry and spend a majority of his career at Intel Corporation and Qualcomm Inc, in various roles from Design Engineering, Product development, Platform Applications and... Read More →
Wednesday October 23, 2024 2:55pm - 3:13pm PDT
Grand Ballroom H (Level 1)
  HPC / Data Center
 
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