About me
My early engagement (Poland) included parallel programming. Later high-end computer graphics (Japan) with performance focus. In 1996 engaged with a embedded debug & trace probe vendor (California) and as VP of R&D I designed trace probes and tools. At the first RISC-V Summit I felt in love with RISC-V and later become N-Trace TG chair to drive RISC-V trace as universal, efficient, and easy to use standard. At the end of 2024 I joined MIPS hoping to push debug & trace into uncharted territories.