About me
Richard Newell is responsible for architecting the security features for Microchip's current and future generations of FPGAs and SoC FPGAs. Richard has an electrical engineering background with over 45 years of experience in analog and digital signal processing, cryptography, control systems, inertial sensors and systems, and FPGAs. He is an alumnus of the University of Iowa. Richard is the recipient of over one dozen U.S. patents and is the current chairperson of the RISC-V Cryptographic Extensions Task Group.