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October 22-23, 2024
Santa Clara, CA
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The Sched app allows you to build your schedule but is not a substitute for your event registration. You must be registered for RISC-V Summit to participate in the sessions. If you have not registered but would like to join us, please go to the event registration page to purchase a registration.
Tuesday October 22, 2024 9:40am - 10:00am PDT
Nine years ago, NVIDIA selected RISC-V for its embedded microcontrollers. Since then, we developed many processors and software stacks, all based on a common underlying hardware and software architecture. Today, every NVIDIA chip comes with multiple embedded RISC-V microcontrollers, each customized for a specific application. In the presentation, we will discuss our architecture as well as several applications. RISC-V’s rich feature set, configurability, extensibility, and active community are reasons why we stand by our 2015 decision to use RISC-V.
Speakers
avatar for Frans Sijstermans

Frans Sijstermans

Vice President Multimedia Arch/ASIC, NVIDIA
Frans Sijstermans earned his MSc degree in Computer Science from the Eindhoven University of Technology in 1985. He worked as a researcher at Philips in The Netherlands and Palo Alto, USA, until 1998. After that he held various managerial positions at Philips Semiconductors, TriMedia... Read More →
Tuesday October 22, 2024 9:40am - 10:00am PDT
Mission City Ballroom B2 - B5 (Level 1)

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