RISC-V Summit

Sail is a powerful language for describing a processor architecture and is already used to define a number of widely-used architectures like Arm, x86, and RISC-V.

For a Sail representation to serve as a “single source of truth” for an ISA, though, there are some unmet requirements, including comprehensive human-readable ISA documentation, as this must currently be created and maintained separately.

In addition, to make good use of Sail, some sort of transformation is required, as there are no meaningful projects that directly consume Sail. The only parser for Sail is written in OCaml. Both languages are arguably obscure enough that they present barriers to effective utilization of the RISC-V Sail specification to its full potential.

This presentation outlines alternative approaches to providing a single source of truth for the RISC-V ISA that meets the criteria of: simple format, easily parsed by both machine and human, reasonably comprehensive including providing human-readable documentation, and does not necessarily preclude the use of Sail, in which the RISC-V ecosystem has significantly invested.