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October 22-23, 2024
Santa Clara, CA
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Monday October 21, 2024 10:00am - 10:25am PDT
This talk covers the basics of CHERI to give a solid understanding of the technology. It covers the impact on the design of the CPU as well as how it is actually used to give memory safety, control flow integrity etc. and covers the progress with the standardization.


Speakers
avatar for Tariq Kurd

Tariq Kurd

Distinguished Engineer and Lead IP Architect, Codasip
I have been chair of RISC-V code-size, and Zfinx, and these days am heavily involved in CHERI standardisation for RISC-V.
Monday October 21, 2024 10:00am - 10:25am PDT
Grand Ballroom H (Level 1)

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