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October 22-23, 2024
Santa Clara, CA
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Wednesday October 23, 2024 2:35pm - 2:53pm PDT
This session provides an in-depth overview of a highly parameterizable open-source IOMMU IP compliant with the RISC-V IOMMU Specification v1.0. The IP was developed by Zero-Day Labs and is currently being verified in collaborative efforts with 10xEngineers. The presentation covers the implementation details of the IP, which includes features like two-stage address translation, MSI translation support, and internal IO Address Translation Caches (IOATCs) for improved performance. We discuss the verification process carried out in collaboration with 10xEngineers, which has achieved 85% of coverage targets and addressed several RTL bugs and design issues. Additionally, the session highlights the current applications of this IP in projects such as the AlSaqr 2.0 platform for autonomous nano-UAVs and the PULP Carfield architecture. The session concludes with future work plans (e.g., completing the verification and performing design optimizations) and opportunities for community collaboration to enhance the IP further.
Speakers
avatar for Saad Waheed

Saad Waheed

Manager/ Sr. Verification Engineer, 10xEngineers
Saad Waheed is a Sr. Verification Engineer and Manager at 10xEngineers. His expertise lies in the domain of design verification of RISC-V based processors and SoCs. His prior experience includes working with SiFive on the verification of its RISC-V cores for the Core IP 21G1 release... Read More →
avatar for Manuel Rodriguez

Manuel Rodriguez

PhD Student / Hardware Architect, Zero-Day Labs
Manuel Rodríguez earned his M.Sc. degree in Electronic and Computer Engineering from the University of Minho, Portugal, with a focus on Embedded Systems and Micro/Nanotechnologies. He is currently pursuing a Ph.D. at the same institution. Additionally, he works as a hardware architect... Read More →
Wednesday October 23, 2024 2:35pm - 2:53pm PDT
Grand Ballroom H (Level 1)
  HPC / Data Center

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