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October 22-23, 2024
Santa Clara, CA
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Wednesday October 23, 2024 2:15pm - 2:33pm PDT
RISC-V allows the freedom to innovate with custom instructions but working out which custom instructions add the most value is key to success and more easily done with simulation and models than RTL. At the same time new applications such as AI/ML are creating ever more complex SoCs with very high core counts. Using models in a digital twin of the design allows fast architectural exploration, accelerates software development and post silicon can help with DevOps flows and diagnosing in-field failures. This talk discusses two custom SoC projects where virtual platforms have been used to successfully develop software for many core systems in advance of silicon being available. This requires fast, accurate golden models of the CPUs in a simulation environment which can scale to hundreds or more cores.
Speakers
avatar for Jon Taylor

Jon Taylor

Senior Director of Product Management, Synopsys
Jon has over 20 years of experience in the semiconductor industry, working in technical areas from CPU verification to embedded software, and commercial areas including field applications and technology strategy. He has worked on multiple architectures including Arm, RISC-V and proprietary... Read More →
Wednesday October 23, 2024 2:15pm - 2:33pm PDT
Grand Ballroom G (Level 1)
  Software

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