Name: Load/Store Pair for RV32 (Zilsd & Zclsd) - Christian Herber, NXP
Start: 2024-10-22T11:50:00-0700
End: 2024-10-22T12:08:00-0700

October 22-23, 2024
Santa Clara, CA
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Tuesday October 22, 2024 11:50am - 12:08pm PDT

Theater (Level 2)

The Zilsd & Zclsd extensions provide load/store pair instructions for RV32, reusing the existing RV64 doubleword load/store instruction encodings. The extensions are expected to be implemented in all kinds of embedded processors, with optimal performance being reached in core with a data bus of at least 64 bit - a property commonly given in superscalar implementations. The impact on code size of this extension is discussed in detail, leading to recommendations for future compiler improvements.

Speakers

Christian Herber

Senior Principal RISC-V Architect, NXP

Christian Herber is a Senior Principal RISC-V Architect at NXP, working on innovation management and technical roadmaps for RISC-V processors. He led several specification efforts, e.g. the "Load/Store Pair for RV32" RISC-V fast-track extension and the "OpenHW Group Core-V Extension... Read More →

Tuesday October 22, 2024 11:50am - 12:08pm PDT
Theater (Level 2)

ISA and Design Tools

Audience Experience Level Any

RISC-V Summit

Christian Herber

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